Total-OCTAVA, MIL-STD-1553 Terminal with Integrated Transformers

Total Octava

Sital’s Total-OCTAVA™ MIL-STD-1553 devices integrate a BC/RT/Monitor or RT-only MIL-STD-1553B protocol engine, memory management, processor interface logic, 4K or 64K words of RAM, dual 1553 transceiver and dual transformer in a 312-ball Plastic BGA (Ball Grid Array) package. The Total-OCTAVA™ is a pin-to-pin replacement for DDC’s® BU-64863T8 Total-ACE®, providing electrical, mechanical and architectural compatibility.

The design of the Total-OCTAVA is based on the design of Sital’s original OCTAVA, which is a drop-in replacement for DDC’s Enhanced Mini-ACE. Total-OCTAVA builds on the OCTAVA design with the addition of integrated isolation transformers.




Part Number Mode Memory Organization Description RFQ RFI Tech Support
OCT-64863T8-E02 BC/RT/Monitor 64K x 17 RAM  Asynchronous local bus interface, -40 to +100° C,
MIL-STD-1553/1760 amplitude compliant
RFQ RFI Tech Support
OCT-64743T8-E02 RT-only 4K x 16 RAM Asynchronous local bus interface, -40 to +100° C,
MIL-STD-1553/1760 amplitude compliant
RFQ RFI Tech Support



Over the past ten years, Sital has built thousands of OCTAVAs which have been flying in military systems.

Total-OCTAVA is supplied with an asynchronous local bus host interface similar to DDC’s, operating into internal registers and either 4K x 16 or 64 K x 17 of shared RAM. The 64 K x 17 version also provides parity generation and checking on all host and internal (1553) accesses.

The Total-OCTAVA’s bus controller (BC) includes a 29-instruction set providing a high degree of processor offloading by automating message scheduling, asynchronous message insertion, facilitating bulk data transfers and double buffering, message retry and bus switching strategies, data logging, fault reporting and issuing host interrupts. The 29 instructions include all 20 of DDC’s instructions plus 9 additional instructions. The BC also includes a General Purpose Queue which can be used for stacking information regarding interrupt conditions or other user data.

To support a variety of 1553 Remote terminal (RT) application requirements, the Total-OCTAVA RT provides programmable options for single, double and circular subaddress buffering, along with a global circular buffer option that can be used for multiple (or all) receive or broadcast subaddresses. To further offload the host, the circular buffer options provide interrupts for 50% and 100% rollover conditions. For stacking of interrupt events, the RT also includes an Interrupt Status Queue.

The Total-OCTAVA bus Monitor enables incoming messages to be filtered based on their RT Address, T/R bit and subaddress and includes its own Interrupt Status Queue.

The Total-OCTAVA is multiprotocol, supporting MIL-STD-1553A, MIL-STD-1553B, STANAG-3838 and General Dynamics 16PP303, along with McAir A3818, A5232 and A5690.

Sital’s MIL-STD-1553 transceivers consume and dissipate extremely low power, with the transmitter dissipating less than 300 mW at 100% transmit duty cycle. Sital’s transmitter also includes a unique, real-time feature to minimize or eliminate residual voltages, aka dynamic offset (or “tails”) at the end of 1553 message transmissions.

The Total-OCTAVA BC also includes an option (that defaults to "off") for detecting messages transmitted by an impersonating BC. If such messages are detected, they are reported to the BC's host processor. The BC includes an additional option for providing intrusion protection (IPS). If this option is activated, the BC will "crash" an impersonating message by transmitting a superceding message on top of the impersonating message, thereby invalidating it.

For applications involving McAir protocols, Sital can supply Micro-OCTAVA-TEs with transceivers providing compatibility with the McAir A3818, A5232 and A5690 standards.

The Total-OCTAVA is available in industrial (-40 to +100° C) temperature range. For military temperature range versions (-55 to +125° C), please contact Sital.




  • MIL-STD-1553B Notice 2, MIL-STD-1553A and MIL-STD-1760 compliant terminals
  • Second Source to DDC® BU-64863T8 Total-ACE®
  • 100 x 0.600 x 0.185-inch (27.5 x 15.2 x 4.7 mm) plastic 312-ball BGA
  • Register/memory architecture and functionality compatible with DDC® Enhanced Mini-ACE®, Mini-ACE Mark3®, Micro-ACE(TE)® and Total-ACE®
  • Asynchronous local bus host interface. Available with options for high-performance parallel interface, PCI Express, high-performance synchronous PCI or SPI interface
  • Highly autonomous BC with 29 instructions, condition flags and general purpose queue
  • For RT mode, single, double and circular buffering options
  • Selective Monitor mode with filtering and programmable option for storing monitored data in IRIG-106 Chapter 10 file format
  • 50% Rollover Interrupts for RT and Monitor Stacks & Circular Buffers
  • 3V only power, with very low power dissipation and built-in real-time transmitter “tails” compensation to eliminate residual voltages (dynamic offset).
  • Available in -40 to 100° C temperature range. For -55 to 125° C, consult Sital.
  • BC detection of impersonating BC, with option to invalidate impersonating messages
  • RT monitoring for wire faults and reporting information
  • Denial of Service detection
  • As an option, Sital also offers its Safe and Secure (SnS) detection of authentication violations, plus wire fault detection and location, plus a cloud-based Health Management application.


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