System in Package (SiP)

Micross AIT offers a high complexity package technique that allows for tighter footprint design, weight less, and have a higher power performance. This technique allows for die to be put in a single package with density array integration and gain multiple levels of munitization with the use of bare die with multiple functions. With this technique, components will reach a Moisture Sensitivity Level of 2 or higher and support operating temperatures fo more than 200°C. 

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System in Package is a Reliable Highly Integrated Assembly Alternative
  • Facilitating large scale integration of single or multiple active & discrete components
  • Utilizing commercially available active semiconductor die and discretes
  • Material property selections based on operating temperature & MSL
  • Traditional die attach & wire-bond, die stacking & C4 flip-chip
  • Multi-layer organic, co-fired alumina, silicon & aluminum nitride based substrates for improved operating temperature range
  • High density signal routing with impedance matching, single ended and differential routes.
  • Screen print solder paste for discrete electrical connection with or without Epoxy Tack down
  • Pocket Lid attach option for PoP visual effects and device protection
  • Transfer Molded Encapsulation, Kovar seal-ring & Seam Seal LID or Solder Seal Tub lid options

System in Package

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