Component Design & Packaging

Advanced Interconnect Technologies

2.5 & 3D Heterogeneous Integration

Accessible through joint development projects

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System in Package (SiP)

Next level integration with our reliable, highly integrated assembly alternative, utilizing available active semiconductor die and discretes

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Wafer Bumping & WLP

Supporting wafer sizes up to 200mm with established and proven WLP processes and flexibility to tailor unique solutions

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Multi-Chip Modules (MCMs)

Flip chip assembly, precision die placement, heterogeneous integration, plasma assisted dry soldering (PADS) process

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Novel Microfabrication & MEMS

Wafer-level vacuum packaging, monolithic device integration, 3D microstructures for vacuum microelectronics

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Design, Packaging & Assembly

Assembly Services

Comprehensive array of in-house assembly capabilities that spans both the United States and Europe

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Final Test

STS performs the final quality assurance test to identify latent defects that could cause failures in the early operation

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Chip on Board (CoB)

Low cost integration facilitating single or multiple active & discrete components with a reliable assembly alternative

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Plastic Packaging (BGA/CSP/QFN)

Chip scale packages offer near-die size footprints and reduce package thickness and weight

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Hermetic Packaging

Ceramic, metal can, two/four-sided LCC, gull wing, QFP, PGA, flat pack, formed-leaded flat pack

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