Micross AIT works with a wide variety of clients and partners, bringing integrated process, design, testing and analysis capabilities to projects involving custom application-driven development.
Micross AIT offers access to our 2.5D/3D technology platform through joint development projects, prototyping services and small volume production. Our 2.5D/3D integration technology platform is based on several enabling process modules, which include:
Through-silicon via (TSV) interconnects
High density 3D IC applications, filled 2-10 μm diameter, up to 8:1 aspect ratio and 10-50 μm pitch
Lower density 2.5D/3D package architectures, 10-50 μm diameter, aspect ratio of 4:1 to 6:1 and 50-500 μm pitch; vias can be filled or barrel coated
Wafer thinning (to < 20 μm Si thickness) and processing on temporary carrier wafer
Flip-chip and high-density metal-metal bonding, down to <10 μm pitch
Large-area multi-level metal routing with standard RDL (down to 10 μm L/S) or dual damascene process (down to 6 μm L/S)
3D IR focal plane with TSVs in 0.35 µm analog readout IC (with DRS Technologies)
Embedded computing module built with Si interposer
High density TSV test chip bonded to fanout substrate
x-SEM of a 100 µm thickness Si interposer with Cu-filled TSVs
x-SEMs of ECM interposer showing TSV contact point (left) and frontside metal stack (right); TSVs are unfilled (barrel coated)
x-SEMs of ECM interposer showing TSV contact point (left) and frontside metal stack (right); TSVs are unfilled (barrel coated)
